Abstract
This paper presents a fully synthesizable True Random Number Generator (TRNG) based on edge chasing in even-stage ring oscillators (RO). The proposed configurable RO with an automatic self-calibration loop enables robust high-speed operations and high-quality outputs under -40 to 125°C and 0.7 to 1.2V conditions, digital layout mismatch and process variations, and power injection attacks. Ten 65nm prototypes designed in unmodified digital flow using only foundry standard cells demonstrate random bit generation at up to 100.8Mbps and pass all NIST tests without post-processing.
Type
Publication
2023 IEEE Symposium on VLSI Circuits
Yan He
Ph.D. Student (started in 2018)
