A Sequence Dependent Challenge-Response Puf Using 28nm SRAM 6T Bit Cell

Abstract

Conventionally, SRAM PUFs are only used for chip ID. The proposed sequence dependent PUF expands the challenge-response space of an SRAM PUF by an order of rows(sequence length-1), making it suitable for authentication. In addition, it has a sequence dependent non-linear behavior making it more immune to machine learning attacks. In 28nm, the 64×64 SRAM-based PUF has a bit area of 388F2 with energy ranging from 30fJ/bit-88fJ/bit at 0.6V. It also provides high throughput, from 2.2Gbps to 6.8Gbps at 0.9V.

Publication
2017 Symposium on VLSI Circuits
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Kaiyuan Yang
Associate Professor of ECE