A 23Mb/s 23pJ/b Fully Synthesized True-Random-Number Generator in 28nm and 65nm CMOS


True random number generators (TRNGs) use physical randomness as entropy sources and are heavily used in cryptography and security [1]. Although hardware TRNGs provide excellent randomness, power consumption and design complexity are often high. Previous work has demonstrated TRNGs based on a resistor-amplifier-ADC chain [2], oscillator jitter [1], metastability [3-5] and other device noise [6-7]. However, analog designs suffer from variation and noise, making them difficult to integrate with digital circuits. Recent metastability-based methods [3-5] provide excellent performance but often require careful calibration to remove bias. SiN MOSFETs [6] exploit larger thermal noise but require post-processing to achieve sufficient randomness. An oxide breakdown-based TRNG [7] shows high entropy but suffers from low performance and high energy/bit. Ring oscillator (RO)-based TRNGs offer the advantage of design simplicity, but previous methods using a slow jittery clock to sample a fast clock provide low randomness [1] and are vulnerable to power supply attacks [8]. In addition, the majority of previous methods cannot pass all NIST randomness tests.

2014 IEEE International Solid-State Circuits Conference (ISSCC)
Kaiyuan Yang
Assistant Professor of ECE