If a chip can fit a million transistors, surely there is room for a million more! I personally am interested in any kind of heterogenous integration+post-CMOS processing and the circuit designs that precede it. Currently I am working towards the design of evaluation circuits for 3D integrated NVM components, and chip scale energy harvesting.

Awards

• Deans Prize, Rice ECE, 2025
• NSF GRFP Honorable Mention, 2025
• Texas Instruments Scholarship, UT ECE, 2024